Non-Volatile Memory Array Characterization Senior Manager
May 7, 2019 旺宏電子 Macronix International,   Hsinchu, Taiwan

1. Analysis memory array integrity, include process defect, initial behavior, early life time fail, and long term reliability. 
2. Analysis memory array data with statistic way for Test Element Groups, Memory Blocks, Chips, Wafers
3. Define test plan and utilize WAT test bench for TEG and/or FPGA based test platform for chips. 
4.  Collaborate with process and device group to identify the strength and weakness of memory array with different process approaches.
5. Collaborate with test group to develop suitable methodologies to detect process, and secure overall test time.
6. Collaborate with circuit designer, not only implement suitable test mode to enhance the test sensitivities & accuracy, but develop new operation mode to enhance memory integrity.
7. Collaborate with reliability group to validate the acceleration methods, and then qualify the memory technologies.
8.  Provide electrical solutions and/or structure requirement to improve the array integrity
9. Develop suitable memory array operation conditions for different application and product specification.

1. 5+ years experience dedicated in non-volatile memory cell and/or memory array characterization, not include embedded application. 
2. Familiar with the NVM Performance & Reliability, and key factors from Array Architecture, Process Integration, and Operation Conditions.
3. Capability to define and execute test plan, and then handle massive data collected from memory array.
4. Experience to co-work with different function group especially Process Integration, Circuit Designer, Test Engineer, and Reliability Engineer.  
5. Capability to plan and execute special task is preferred.
6. PhD/MS degree in Electronics Engineering or Physics is preferred.

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